Academic Achievements
An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel
Dec 30, 2021 |
  • Journal:
     PROCEEDINGS OF THE 2019 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, DATE 2019
  • Document Code:
     SY156815
  • Page Number:
     1040-1045
  • Translation or Not:
     no
  • Date of Publication:
     Jan 1, 2019