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严昌浩
教授
Supervisor of Doctorate Candidates
Name (Pinyin):Yan Changhao
Date of Birth:1974-05-16
E-Mail:yanch@fudan.edu.cn
Date of Employment:2006-07-01
School/Department:集成电路与微纳电子创新学院
Education Level:研究生毕业
Business Address:上海浦东新区张衡路825号（复旦大学张江校区）微电子楼207
Gender:Male
Degree:博士学位
Professional Title:教授
Status:Employed
Academic Titles:科研人员
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Academic Achievements
Academic Achievements
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network -PROCEEDINGS OF THE 2019 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, DATE 2019 -2019-01-01
Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method -IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES -2009-01-01 -E92-A
Feature-Scale Simulations of Particulate Slurry Flows in Chemical Mechanical Polishing by Smoothed Particle Hydrodynamics -Communications in Computational Physics -2014-01-01 -16
A Novel Unified Dummy Fill Insertion Framework with SQP-Based Optimization Method -2016 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) -2016-01-01 -07-10-November-2016
Batch Bayesian optimization via multi-objective acquisition ensemble for automated analog circuit design -35TH INTERNATIONAL CONFERENCE ON MACHINE LEARNING, ICML 2018 -2018-01-01 -80
An efficient multi-fidelity Bayesian optimization approach for analog circuit synthesis -PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) -2019-01-01
Layout Decomposition with Pairwise Coloring and Adaptive Multi-Start for Triple Patterning Lithography -ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS -2015-01-01 -21
Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography -IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS -2016-01-01 -35
Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis -IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS -2018-01-01 -37
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation -IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS -2018-01-01 -37
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